The present invention generally relates to high-speed data communications. More specifically, the invention relates to an improved integrated line driver, which solves problems associated with integration density, power efficiency, and the need for transmitted signal swings in excess of the breakdown voltage of the selected semiconductor technology.
With the advancement of technology, and the need for instantaneous information, the ability to transfer digital information from one location to another, such as from a central office (CO) to a customer premise (CP) has become more and more important.
In a digital subscriber line (DSL) communication system, data is transmitted from a CO to a CP via a transmission line, such as a two-wire twisted pair, and is transmitted from the CP to the CO as well, either simultaneously or in different communication sessions. The same transmission line might be utilized for data transfer by both sites or the transmission to and from the CO might occur on two separate lines. In this regard reference is now directed to FIG. 1, which illustrates a prior art xDSL communication system 1. Specifically, FIG. 1 illustrates communication between a central office (CO) 10 and a customer premise (CP) 20 by way of twisted-pair telephone line 30. While the CP 20 may be a single dwelling residence, a small business, or other entity, it is generally characterized as having plain old telephone system (POTS) equipment, such as a telephone 22, a public switched telephone network (PSTN) modem 25, a facsimile machine (not shown), etc. The CP 20 may also include an xDSL communication device, such as an xDSL modem 23 that may permit a computer 24 to communicate with one or more remote networks via the CO 10. When a xDSL service is provided, a POTS filter 21 might be interposed between the POTS equipment 22 and the twisted-pair telephone line 30. As is known, the POTS filter 21 includes a low-pass filter having a cut-off frequency of approximately 4 kilohertz to 10 kilohertz, in order to filter high frequency transmissions from the xDSL communication device 23 and to protect the POTS equipment.
At the CO 10, additional circuitry is provided. Generally, a line card (i. e., Line Card A) 18 containing line interface circuitry is provided for electrical connection to the twisted-pair telephone line 30. In fact, multiple line cards 14, 18 may be provided to serve a plurality of local loops. In the same way, additional circuit cards are typically provided at the CO 10 to handle different types of services. For example, an integrated services digital network (ISDN) interface card 16, a digital loop carrier line card 19, and other circuit cards, for supporting similar and other communication services, may be provided.
A digital switch 12 is also provided at the CO 10 and is configured to communicate with each of the various line cards 14, 16, 18, and 19. On the outgoing side of the CO (ie., the side opposite the various local loops), a plurality of trunk cards 11, 13, and 15 are typically provided. For example, an analog trunk card 11, a digital trunk card 13, and an optical trunk card 15 are illustrated in FIG. 1. Typically, these circuit cards have outgoing lines that support numerous multiplexed DSL service signal transmissions.
Having introduced a conventional xDSL communication system 1 as illustrated and described in relation to FIG. 1, reference is now directed to FIG. 2, which is a prior art functional block diagram illustrating the various elements in a xDSL communications link 40 between a line card 18 located within a CO 10 and a xDSL modem 23 located at a CP 20. In this regard, the xDSL communications link 40 of FIG. 2 illustrates transmission of data from a CO 10 to a CP 20 via a transmission line 30, such as, a twisted-pair telephone transmission line as may be provided by a POTS service provider to complete a designated link between a CO 10 and a CP 20. In addition, FIG. 2 further illustrates the transmission of data from the CP 20 to the CO 10 via the same twisted-pair telephone transmission line 30. With regard to the present illustration, transmission of data may be directed from the CP 20 to the CO 10 from the CO 10 to the CP 20 or in both directions simultaneously. Furthermore, data transmissions can flow on the same twisted-pair telephone transmission line 30 in both directions, or alternatively on separate transmission lines (one shown for simplicity of illustration). Each of the separate transmission lines may be designated to carry data transfers in a particular direction either to or from the CP 20.
The CO 10 may include a printed circuit line card 18 (see FIG. 1) that includes a CO-digital signal processor (DSP) 43, which receives digital information from one or more data sources (not shown) and sends the digital information to a CO-analog front end (AFE) 45. The CO-AFE 45 interposed between the twisted-pair telephone transmission line 30 and the CO-DSP 43 may convert digital data, from the CO-DSP 43, into a continuous time analog signal for transmission to the CP 20 via the one or more twisted-pair telephone transmission lines 30.
One or more analog signal representations of digital data streams supplied by one or more data sources (not shown) may be converted in the CO-AFE 45 and further amplified and processed via a CO-line driver 47 before transmission by a CO-hybrid 49, in accordance with the amount of power required to drive an amplified analog signal through the twisted-pair telephone transmission line 30 to the CP 20. A CP-hybrid 48, located at the CP 20, may then be used to de-couple a received signal from the transmitted signal in accordance with the data modulation scheme implemented by the particular xDSL data transmission standard in use. The CP-AFE 44, located at the CP 20, having received the de-coupled received signal from the CP-hybrid 48, may then convert the received analog signal into a digital signal, which may then be transmitted to a CP-DSP 42 located at the CP 20. Finally, the digital information may be further transmitted to one or more specified data sources such as the computer 24 (see FIG. 1).
In the opposite data transmission direction, one or more digital data streams supplied by one or more devices in communication with the CP-DSP 42 at the CP 20 may be converted by the CP-AFE 44 and further amplified via CP-line driver 46. As will be appreciated by those skilled in the art, the CP-line driver 46 may amplify and forward the transmit signal with the power required to drive an amplified analog signal through the twisted-pair telephone transmission line 30 to the CO 10. It is significant to note that the CP-hybrid 48 is used to regenerate the transmit signal so it may be subtracted from the receive signal when the DSL is receiving. As a result, the CP-hybrid 48 does not affect the transmitted signal in any way. The CO-AFE 45 may receive the data from the CO-hybrid 49, located at the CO 10, which may de-couple the signal received from the CP 20 from the signal transmitted by the CO 10. The CO-AFE 45 may then convert the received analog signal into one or more digital signals, which may then be forwarded to the CO-DSP 43 located at the CO 10. Finally, the digital information may be further distributed to one or more specified data sources (not shown) by the CO-DSP 43.
Having briefly described a xDSL communications link 40 between the line card 18 located within the CO 10 and the xDSL modem 23 located at the CP 20 as illustrated in FIG. 2, reference is now directed to FIG. 3. In this regard, FIG. 3 is a prior art circuit schematic for a conventional line driver 47. In communication systems designed to transmit data over metallic transmission lines, the line driver is an amplifier which delivers the energy required to transmit the intended signal to the line via a back-matching resistor. Often impedance and voltage scaling is performed by coupling the output from the line driver amplifiers to the transmission line via a transformer.
The back-matching resistor 70 serves two purposes. First, the back-matching resistor 70 serves to match the impedance 82 at the end of the transmission line 30. In order to provide a sufficient return loss, a resistor approximately equal to the line""s characteristic impedance 82 must terminate the line. Second, the back-matching resistor 70 permits the line driver 47 to simultaneously receive signals generated from a remote transmitter coupled to the transmission line 30 at the same time the line driver 47 is transmitting. The line driver 47 cannot terminate the transmission line 30 alone because the line driver 47 presents a low impedance to the remotely transmitted signal. The remotely transmitted signal is recovered by subtracting from the voltage on the transmission line 30 the voltage introduced on the transmission line 30 by the local transmitter. A hybrid amplifier 90 performs the task of separating and recovering the remotely transmitted signal from the transmission line. Each of these elements is present in the circuit schematic of a prior art conventional line driver 47 as illustrated in FIG. 3.
As illustrated in FIG. 3, the input to the conventional line driver 47 is fed into the input of a pre-amplifier stage, herein illustrated by pre-amp A 60 and pre-amp B 62. The pre-amplifier stage then feeds the high-power driver amplifiers, designated driver A 64 and driver B 66. The pre-amplifier stage, if implemented via complementary metal oxide semiconductor (CMOS) technology, would have nearly infinite input impedance. The outputs of the high-power driver amplifiers 64, 66 are loaded by the back-matching resistors, herein designated Rt 70, in series with the impedance presented by the primary of the line transformer. For simplicity, a transformer with a 1:1 turns ratio is illustrated, thus making the impedance looking into the primary equivalent to the line impedance labeled Zl 82.
As illustrated in FIG. 3, the outputs of the high-power driver amplifiers 64, 66 are fed to a scaled version of the load via back-matching resistors, herein designated nRt 72 and an emulated line impedance, nZl 84 in addition to being coupled to a load 100. The load 100 may comprise the transformer 80, the twisted-pair telephone transmission line 30, and a load impedance, herein designated Zl 82. The transmit signal generated across the emulated line impedance, nZl 84, is subtracted from the combined receive and transmit voltage appearing at the primary of the transformer by a hybrid amplifier 90. As further illustrated in FIG. 3, the output of the hybrid amplifier 90, VRxe2x88x92(xe2x88x92VR) should comprise the received signal from a remotely located transmitter after the transmit signal has been subtracted, or 2VR. The back-matching resistors 70 emulate the impedance of the transmission line load as seen looking into the primary of a transformer 80. For simplicity, the transformer 80 illustrated in the circuit of FIG. 3 is a 1:1 transformer 80, in which Rt 70 is equal to xc2xd Zl.
It is important to note that one-half of the output voltage signal swing will be present across the two back-matching resistors, Rt 70. This is true independent of the transformer 80 winding ratio. The impedance is only matched if the sum of the back-matching resistors, Rt 70 equals the line impedance Zl 82, which limits the power and voltage efficiency of a conventional CMOS line driver to less than 50%. Only 50% of the power delivered by the line driver is actually delivered to the transmission line 30, while half is dissipated in the back-matching resistors 70.
Having briefly described the operation of a conventional prior art line driver 47 as illustrated in the circuit schematic of FIG. 3, reference is now directed to FIG. 4, which illustrates a detailed view of the output stage of a CMOS line driver 200. For ease of illustration and discussion, the pre-amplifier and high-power gain stages, the class A-B control stage, the hybrid matching network and the hybrid amplifier all typical elements of a line driver are not illustrated. Those skilled in the art will appreciate and understand the operation and implementation of the circuitry required to realize the omitted portions of the line driver 47 and the hybrid 49. The focus of FIG. 4 is on the core output stage of a prior art CMOS line driver 200.
As illustrated in FIG. 4, the output stage of a conventional CMOS line driver 200 may comprise a pair of PMOS (MP) and NMOS (MN) devices herein designated as AMP A and AMP B. The PMOS device may source current from a power supply (not shown) into the load 100, while the NMOS device on the other side of the transformer 80 sinks the same current from the load 100 into ground. The preceding stage, not shown in this simplified schematic, performs the input sensing, amplification, and the class A-B quiescent current crossover control for the illustrated output devices. The class A-B control typically limits the current drawn from the non-active device to a significantly smaller value than the maximum in order to increase efficiency. If class B operation is assumed with ideal devices, implying no bleed current for the non-active device, the maximum single-ended signal swing across the transformer 80 will be xc2xd VDD, the supply voltage.
Further assuming that AMP A is sourcing the load 100 current and AMP B is sinking an equivalent load 100 current, a voltage potential maximum of VDD may be realized at the drain of the MP device of AMP A and voltage ground at the drain of the MN device of AMP B. Since Zl is 2Rt a simple voltage division of 2 is realized looking at the transformer 80 and one-half of the supply voltage, VDD will be applied across the primary of the transformer 80. Reversing the polarity, xe2x88x92xc2xdVDD will be applied across the primary of the transformer 80 for a maximum peak-to-peak voltage of VDD.
With real devices, the actual maximum signal swing is significantly smaller. Typical values for 5 Volt CMOS line drivers are about 6 Vpp out of the driver, or 3 Vpp on the line. Current CMOS line drivers operated with a 5-Volt power supply are unable to deliver the maximum power required for several higher power xDSL applications. The peak currents required using the conventional CMOS output driver 200 for various xDSL communication standards may be identified using the following formula:                                           I            p                    =                                                    PAR                2                                            V                p                                      *                          10                              (                                  PWR                  /                  10                                )                                                    ,                            Eq        .                  xe2x80x83                ⁢        1            
where Ip is the peak current in mA, PAR is the peak-to-average ratio for the coding method associated with the xDSL standard, PWR is the power delivered to the line in dBm, and Vp is the single-ended peak voltage across the primary of the transformer 80. If 3 Vpp is applied across the transmission line, the required peak current for HDSL2 (16.8 dBm pulse amplitude modulation (PAM); PAR=3.8) would be 461 mA. If the same 3 Vpp is applied across the transmission line, the required peak current for ADSL-CP (12.5 dBm discrete multi-tone (DMT); PAR=5.1) would be 308 mA. Likewise, the required peak current for ADSL-CO (20.5 dBm DMT; PAR=5.1) would be 1945 mA, clearly beyond the capability of currently available conventional 5 Volt CMOS line drivers, as conventional 5 Volt CMOS line drivers have a maximum output current typically in the 100 mA through 350 mA range. However, if the effective output signal swing, Vp, is increased, the required current would scale inversely, which would enable the delivery of proportionally more power over the twisted-pair telephone transmission line 30 (see FIGS. 1 and 2).
Increasing the effective output signal swing creates significant problems for semiconductor devices. Semiconductor devices can be designed to withstand higher supply voltages by altering diffusion profiles of semiconductor dopants across the various materials comprising each device. However, modifying the diffusion profiles across the device inherently alters the operating characteristics of the device, generally resulting in much slower devices. Any gains in transmitted power are significantly offset due to the lower maximum operating rate of the modified devices. In addition, altering diffusion profiles of semiconductor devices to permit larger supply voltages is not very attractive for economic reasons. Such a processing modification entails significant development and manufacturing costs to realize a new family of semiconductor devices. Furthermore, modification of diffusion profiles for output stage devices requires the development of a suite of new computer models for designing circuits using the new devices.
Accordingly, there is a need for a line driver that can be realized with standard CMOS devices that is capable of operating at power supply voltages that exceed the breakdown voltage of the CMOS output stage devices in order to meet the maximum power requirements for most xDSL applications.
In light of the foregoing, the invention is a circuit and a method for constructing a line driver capable of driving a communications line with a transmitted signal having an output voltage swing in excess of the breakdown voltage of the selected integrated circuit technology. The improved line driver architecture of the present invention provides increased output voltage swing without sacrificing the speed of the technology by modifying the amplifier topology to handle the higher supply voltage. It also does not require any costly processing modifications, as conventional 5-Volt CMOS integrated circuit manufacturing processes can be utilized. It is significant to note that the circuits illustrated hereinbelow, in an effort to best illustrate the present invention, are presented by way of example only. For ease of illustration and description, CMOS devices are used exclusively throughout the various circuits. Those skilled in the art will recognize that the teachings of the present invention will readily apply to other semiconductor technologies as well.
In a preferred embodiment, an improved output stage of a line driver may comprise a first amplifier, a second amplifier, a load, and a plurality of integrated back-matching resistors. By integrating the back-matching resistors in the configuration presented below with regard to FIG. 5, the CMOS line driver may support an increase in the effective signal swing across the transformer that may yield a power increase from 2.5 dB to 3.0 dB.
In a second preferred embodiment, an improved output stage of a line driver may comprise a first amplifier, a second amplifier, integrated back-matching resistors, and a load, wherein both the first and the second amplifiers are supply voltage protected through the addition of protective semiconductor devices in series with the respective amplifier devices. In this particular example, a switched source follower is added in series with both the first and second amplifiers to distribute an increased supply voltage drop appropriately across the improved line driver output stage. With this approach it is possible to double the supply voltage to 10 Volts for standard CMOS devices. Thus, an improved line driver consistent with the teachings of the second preferred embodiment can be expected to yield a 6.0 dB increase in maximum power while sourcing the same maximum current.
A third preferred embodiment comprises a combination of the integrated back-matching resistors and the protective semiconductor devices to support a further increase in the line driver supply voltage. A line driver consistent with the teachings of the third embodiment may be expected to realize an 8.5 to 9.0 dB increase in the maximum power available for data transmission.
The present invention can also be viewed as providing a method for increasing the available signal transmit power along a transmission line. In its broadest terms, the method can be described as: applying a transmit signal to an input stage of an integrated line driver; amplifying the transmit signal such that the output signal swing exceeds the maximum drain-source voltage of the integrated circuit technology used to implement the line driver amplifier(s); and applying the amplified transmit signal via an integrated back-matching resistor network to the transmission line.
A design approach consistent with the teachings of the present invention utilizes standard semiconductor devices even though they are intended for operation with supply voltages that exceed the breakdown voltage associated with the corresponding semiconductor device technology. As a result, special models are not required to simulate line driver circuit variations. Furthermore, various line drivers consistent with the present invention may be constructed of readily available standard integrated circuits. This approach represents a significantly more cost-effective approach to implementing high voltage line drivers. First, the semiconductor devices may be more uniform and may have tighter operational tolerances. In addition, the semiconductor devices will be less expensive as a special manufacturing process will not have to be developed to construct integrated devices that can handle higher power supply voltages.